ld1d { z0.q }, p8/z, [x0]
ld1d { z0.q }, p0/z, [x31]
ld1d { z0.q }, p0/z, [x0, #8, mul vl]
ld1d { z0.q }, p0/z, [x0, #-9, mul vl]
// FIXME: This form is incorrectly accepted:
ld1d { z0.q }, p0/z, [x0, #0]
ld1d { z0.q }, p0, [x0]

ld1d { z0.q }, p8/z, [x0, x0, LSL #3]
ld1d { z0.q }, p0/z, [x31, x0, LSL #3]
ld1d { z0.q }, p0/z, [xzr, x0, LSL #3]
// FIXME: confusing error message:
ld1d { z0.q }, p0/z, [x0, x31, LSL #3]
ld1d { z0.q }, p0/z, [x0, xzr, LSL #3]
ld1d { z0.q }, p0/z, [x0, sp, LSL #3]
ld1d { z0.q }, p0/z, [x0, x0]
ld1d { z0.q }, p0/z, [x0, x0, LSL #2]
ld1d { z0.q }, p0, [x0, x0, LSL #3]

ld1w { z0.q }, p8/z, [x0]
ld1w { z0.q }, p0/z, [x31]
ld1w { z0.q }, p0/z, [x0, #8, mul vl]
ld1w { z0.q }, p0/z, [x0, #-9, mul vl]
ld1w { z0.q }, p0/z, [x0, #0]
ld1w { z0.q }, p0, [x0]

ld1w { z0.q }, p8/z, [x0, x0, LSL #2]
ld1w { z0.q }, p0/z, [x31, x0, LSL #2]
ld1w { z0.q }, p0/z, [xzr, x0, LSL #2]
ld1w { z0.q }, p0/z, [x0, x31, LSL #2]
ld1w { z0.q }, p0/z, [x0, xzr, LSL #2]
ld1w { z0.q }, p0/z, [x0, sp, LSL #2]
ld1w { z0.q }, p0/z, [x0, x0]
ld1w { z0.q }, p0/z, [x0, x0, LSL #3]
ld1w { z0.q }, p0, [x0, x0, LSL #2]

st1d { z0.q }, p8, [x0]
st1d { z0.q }, p0, [x31]
st1d { z0.q }, p0, [x0, #8, mul vl]
st1d { z0.q }, p0, [x0, #-9, mul vl]
st1d { z0.q }, p0, [x0, #0]
st1d { z0.q }, p0/z, [x0]

st1d { z0.q }, p8, [x0, x0, LSL #3]
st1d { z0.q }, p0, [x31, x0, LSL #3]
st1d { z0.q }, p0, [xzr, x0, LSL #3]
st1d { z0.q }, p0, [x0, x31, LSL #3]
st1d { z0.q }, p0, [x0, xzr, LSL #3]
st1d { z0.q }, p0, [x0, sp, LSL #3]
st1d { z0.q }, p0, [x0, x0]
st1d { z0.q }, p0, [x0, x0, LSL #2]
st1d { z0.q }, p0/z, [x0, x0, LSL #3]

st1w { z0.q }, p8, [x0]
st1w { z0.q }, p0, [x31]
st1w { z0.q }, p0, [x0, #8, mul vl]
st1w { z0.q }, p0, [x0, #-9, mul vl]
st1w { z0.q }, p0, [x0, #0]
st1w { z0.q }, p0/z, [x0]

st1w { z0.q }, p8, [x0, x0, LSL #2]
st1w { z0.q }, p0, [x31, x0, LSL #2]
st1w { z0.q }, p0, [xzr, x0, LSL #2]
st1w { z0.q }, p0, [x0, x31, LSL #2]
st1w { z0.q }, p0, [x0, xzr, LSL #2]
st1w { z0.q }, p0, [x0, sp, LSL #2]
st1w { z0.q }, p0, [x0, x0]
st1w { z0.q }, p0, [x0, x0, LSL #3]
st1w { z0.q }, p0/z, [x0, x0, LSL #2]
